InP100 Platform

Sivers Photonics has optimised the integration of indium phosphide, edge emitting laser diodes with silicon CMOS chip technology. The result is our unique, stable, low cost, low-power, InP100 silicon photonics platform. Our platform approach means we reduce design turnaround times for custom devices, whilst benefitting from using a proven, highly stable and reliable production process. We have introduced the InP100 platform approach at exactly the point when optical communications and optical sensing applications require a single-chip, nanoscale solution to meet volume, power, performance and cost demands.

Example Devices

InP RSOA chip optimised for SiPh Flip-Chip Assembly

Key design features:

  1. Vertical alignment surfaces +/- 5 nm height accuracy to optical mode centre (z-axis)
  2. Etched facet with self-aligned front-side fiducials to both ridge (x-axis) and facet (y-axis)
  3. Metal pads for flip chip bonding – AuSn solder optional
  4. Backside alignment fiducials, and chip IDs
  5. Particle-free front-side
InP RSOA 8x-array for SiPh Flip-Chip Assembly

Key design features:

  • Vertical alignment surfaces  +/- 5nm height accuracy to optical mode centre. (z-axis)
  • Etched facet with self-aligned front-side fiducials to both ridge (x-axis) and facet (y-axis).
  • Metal pads for flip chip bonding. AuSn solder optional
  • Backside alignment fiducials, and chip IDs
  • Single chips or multi-element arrays
Wide operating temperature 1310nm DFB
  • Application: 5G LTE
  • Designed for CW operation at 25mW ex-facet output power
  • Functional from -50C to +95C assembled in TOSA packages
  • Performance achieved through optimised MQW active region, grating design, and cavity length
High Power 1550nm DFB for LIDAR
  • Existing 100mW output at 25C
  • Higher powers achievable through  further optimised epi/grating designs for longer cavity lasers
  • LWs down to <300kHz range
  • SMSR > 50dB

Contact Sivers Photonics

For more information about Sivers Photonics, or to discuss your photonics project requirements.

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